1. Field of the Invention
The present invention relates to a compound semiconductor device and a method of manufacturing the same and, more particularly, a compound semiconductor device having a Schottky gate such as a high electron mobility transistor, a metal semiconductor field effect transistor, etc. and a method of manufacturing the same.
2. Description of the Prior Art
As a compound semiconductor device having a Schottky gate, there have been known a high electron mobility transistor (HEMT), a metal semiconductor field effect transistor (MESFET), and the like.
In such compound semiconductor devices, reduction in an influence of surface states upon a surface depletion layer and control of a threshold voltage of a transistor have been achieved by providing a recessed structure in a compound semiconductor layer which is located in a gate electrode connection portion and its peripheral area.
The field effect transistor employing the recessed structure has been set forth in, e.g., 1 IEEE MTT-S Digest (1997) pp1187-1190, 2 IEEE MTT-S Digest (1998) pp439-442, 3 Patent Application Publication (KOKAI) Hei 5-129341, 4 Patent Application Publication (KOKAI) Hei 5-251471, 5 Patent Application Publication (KOKAI) Hei 9-8283, and the like.
For example, the HEMT set forth in the reference 1 has a structure shown in FIG. 1.
In FIG. 1, an undoped AlGaAs buffer layer 102, an n.sup.+ -AlGaAs first electron supply layer 103, an undoped AlGaAs first spacer layer 104, an undoped InGaAs channel layer 105, an undoped AlGaAs second spacer layer 106, an n.sup.+ -AlGaAs second electron supply layer 107, an undoped AlGaAs Schottky layer 108, an n.sup.- -GaAs intermediate layer (buried layer) 109, and an n.sup.+ -GaAs cap layer 110 are formed in sequence on a semi-insulating GaAs substrate 101. An AlGaAs layer 111 is formed between the n.sup.+ -GaAs cap layer 110 and the n.sup.- -GaAs intermediate layer 109.
A first recess 112 is formed in the cap layer 110 to expose the intermediate layer 109 in the periphery of a gate region. In addition, a second recess 114 is formed in the intermediate layer 109 to bury a lower portion of a gate electrode 113 made of tungsten silicide (WSi). The first recess 112 and the second recess 114 are formed to adjust a depth of a surface depletion layer.
A gold (Au) layer 115 is connected to the gate electrode 113 to reduce its resistance value.
The cap layer 110 is separated into a source side and a drain side on both sides of the gate electrode 113 by the first recess 112. A source electrode 116s and a drain electrode 116d, both being ohmic-connected to the cap layer 110, are formed on the cap layer 110 which has remained on the source side and the drain side respectively. In this case, a distance L from an edge of the first recess 112 to an edge of the second recess 114 between the drain electrode 116d and the gate electrode 113 is referred to as a recess length hereinafter.
In such HEMT, carriers supplied from the drain electrode 116d come up to the channel layer 105 via the cap layer 110, . . . , the second spacer layer 106, etc. Then, the carriers travel in the channel layer 105 from the lower side of the drain electrode 116d to the lower side of source electrode 116s by the electric field. Then, the carriers come up to the source electrode 116s via the second spacer layer 106, . . . , the cap layer 110. Travel of the carriers in the channel layer 105 can be controlled by a depletion layer which spreads out from the gate electrode 113 when voltage is applied.
By the way, in the HEMT having the above structure, a sufficient gate breakdown voltage has not been able to be achieved since, if the backward bias voltage is applied to the gate electrode 113, a phenomenon that a leakage current is increased gradually with the lapse of application time, i.e., a walk-out phenomenon, is caused.
Moreover, control of the gate forward bias has not been able to be sufficiently performed.
Besides, the fact that, if the recess length is less than 1 .mu.m, a high power added efficiency cannot be maintained has been confirmed according to the experiment done by the inventors of the present invention.